vhdl program to evaluate an function using mux

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--
-- Title       : mux_fun1
-- Design      : and1
-- Author      : rajashekar
-- Company     : kits
--
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--
-- File        : mux_fun1.vhd
-- Generated   : Wed Jul 17 18:31:30 2013
-- From        : interface description file
-- By          : Itf2Vhdl ver. 1.20
--
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--
-- Description :
--
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--{{ Section below this comment is automatically maintained
--   and may be overwritten
--{entity {mux_fun1} architecture {muxfun1}}

library IEEE;
use IEEE.STD_LOGIC_1164.all;

entity mux_fun1 is
    port (--a:in STD_LOGIC_VECTOR (0 to 7);
    sel:in STD_LOGIC_VECTOR (0 to 2);
    c:out STD_LOGIC
    );
end mux_fun1;

--}} End of automatically maintained section

architecture muxfun1 of mux_fun1 is

component mux_81 is
        port (i:in STD_LOGIC_VECTOR (0 to 7);
    s:in STD_LOGIC_VECTOR (0 to 2);
    y:out STD_LOGIC
    );
end component ;


begin
   
    i0:mux_81 port map ("10010011",sel,c);
    --i1:mux_81 port map (a,'0',c);
    --i2:mux_81 port map (a,'0',c);
    --i3:mux_81 port map (a,'1',c);
    --i4:mux_81 port map (a,'0',c);
    --i5:mux_81 port map (a,'0',c);
    --i6:mux_81 port map (a,'1',c);
    --i7:mux_81 port map (a,'1',c);
   
   

     -- enter your statements here --

end muxfun1;